发明名称 DIGITAL VIDEO SIGNAL RECORDER
摘要 <p>PURPOSE:To enhance the effect of shuffling by forming division units with data collected from an entire screen in the case of parallel processing so as to divide one sheet of screen into plural divisions. CONSTITUTION:A serial/parallel conversion circuit processes a serial data series into three data series. For example, in the case of parallel processing applied to the 1125/60 system for (72X65=4680) macro blocks for one frame, the one frame is divided into 24 blocks in the horizontal direction to form a division area of (3X65) macro blocks. In each division area, a 1st (1X65) macro blocks are formed into a coding block A (input data series with respect to encoder block 8A), a 2nd (1X65) macro blocks are formed into a coding block B (input data series with respect to encoder block 8B), and a 3rd (1X65) macro blocks are formed into a coding block C (input data series with respect to encoder block 8C).</p>
申请公布号 JPH06153151(A) 申请公布日期 1994.05.31
申请号 JP19920316532 申请日期 1992.10.31
申请人 SONY CORP 发明人 KANOTA KEIJI;YANAGIHARA HISAFUMI
分类号 G11B20/12;H04N5/92;H04N9/804;H04N9/888;H04N19/00;H04N19/12;H04N19/126;H04N19/137;H04N19/14;H04N19/176;H04N19/186;H04N19/423;H04N19/436;H04N19/46;H04N19/59;H04N19/625;H04N19/65;H04N19/70;H04N19/80;H04N19/85;H04N19/88;H04N19/91;H04N19/93;(IPC1-7):H04N5/92;H04N7/13 主分类号 G11B20/12
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