发明名称 PICTURE INTERPOLATION PROCESSING CIRCUIT FOR TELEVISION RECEIVER
摘要 <p>PURPOSE:To provide a picture interpolation processing circuit for a television receiver by implementing interpolation processing of a reception signal in the case of the instaneous interruption of the mobile reception of a satellite broadcast and receiving a picture signal with high picture quality. CONSTITUTION:An FM demodulator 5 demodulates a picture signal and an amplitude detection circuit 2 obtains an amplitude detection signal and an amplitude comparator circuit 3 detects the state of a weak electric field at a prescribed level or below. A synchronous signal generator 11 generates continuously a synchronous signal through a synchronous signal separating circuit 10, a discrimination circuit 12 outputs a detection signal corresponding to a prescribed level, and when an amplitude detection signal is a prescribed level or above, a delayed picture signal by one field is outputted from an electronic switch 6 and a delay circuit 7 based on the control signal, and when the amplitude detection signal is at a prescribed level at the weak electric field, an electronic switch 8 replaces the picture signal with the delayed picture signal from the delay circuit 7 based on the control signal and the selected signal is outputted and an electronic switch 14 outputs alternately the delayed picture signal from the delay circuit 7 and an output signal from the electronic switch 8 based on the control signal from the electronic switch 14.</p>
申请公布号 JPH06153105(A) 申请公布日期 1994.05.31
申请号 JP19920322777 申请日期 1992.11.06
申请人 CLARION CO LTD 发明人 SAKATA HARUO
分类号 H04N5/44;H04N19/132;H04N19/136;H04N19/196;H04N19/423;H04N19/50;H04N19/587;H04N19/59;H04N19/85;H04N19/895;(IPC1-7):H04N5/44;H04N7/137 主分类号 H04N5/44
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