Multiprocessor system and interruption control device for controlling interruption requests between processors and peripheral devices in the multiprocessor system

摘要

An interruption control device for controlling interruption requests in a multiprocessor system having a plurality of processor elements and a plurality of peripheral devices. The interruption control device is connected between the processor elements and the peripheral devices. The interruption control device includes a plurality of interruption request registers for indicating the occurrence of an interruption request from either a processor element or a peripheral device to a processor element and a plurality of interruption enable registers for authorizing an interruption request of a processor element. The interruption request registers are read by the processor element being interrupted to identify the source of the interruption request.