| 摘要 |
In a DRAM, a logic "1" is redefined as the minimum VCC value minus one threshold voltage. The word line is not bootstrapped. This intermediate voltage is applied via the sense amplifier to the bit lines during refresh. The intermediate value is controlled preferably by a comparator controlling a driver. Even when the power supply voltage rises, the intermediate voltage is held constant by comparison to a fixed reference voltage. Operating current is substantially reduced because less power is required to write data into the memory cells, since a controlled lower voltage is used.
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