发明名称 DISPLAY CONTROL CIRCUIT
摘要 PURPOSE:To provide the display device in which its mount area is reduced by providing a count-down circuit to the control circuit of the display device and employing only one oscillation circuit. CONSTITUTION:An fV frequency divider 42 outputs a vertical frequency signal S12 to a phase comparator 43 and an output changeover device 44. The phase comparator 43 compares the phase of the inputted vertical frequency signal S12 with the phase of a vertical synchronizing signal S13 and outputs an output switching signal S14 used to represent the result to the output changeover device 44. Upon the recognition of a phase deviation, the output changeover device 44 measures a timing for phase matching and outputs a reset signal S15 to the fV frequency divider 42. Thus, the phase of the vertical frequency signal S12 and the phase of the vertical synchronizing signal S13 are coincidence at all times. When a fault takes place in the vertical synchronizing signal S13, the output changeover device 44 selects the vertical frequency signal S12 having the same phase as the vertical synchronizing signal S13 in the normal state as an output as a vertical synchronizing signal S2 to a vertical synchronizing signal input terminal 49 of an LCD voltage controlled oscillator 47 immediately.
申请公布号 JPH06153122(A) 申请公布日期 1994.05.31
申请号 JP19920302155 申请日期 1992.11.12
申请人 SHARP CORP 发明人 KUMADA KOJI;TANAKA MANABU;ONISHI TAKASHI;KAWAGUCHI HIROSHI
分类号 G09G3/36;H03L7/06;H04N5/66 主分类号 G09G3/36
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