发明名称 PICTURE PROCESSOR
摘要 <p>PURPOSE:To efficiently attain encoding at the time of operating a hierarchical encoding by providing at least more than two memories which store a predicted learning result. CONSTITUTION:Total ten picture element template is formed of a six picture element input 301 of a high resolution and a four picture element input 302 of a low resolution. In a multiplexer 303, an A side is selected during the operation of an encoding/decoding, and the template is outputted to a 306. In predicted state memories 307-310, a bidirectional bus is realized so that an MPS (prior symbol in an arithmetic encoding) (311) 1 bit and a present predicted state (312) 7 bit can be outputted at first, and then updated after the encoding/ decoding of one picture element is ended. A memory control part 317 controls the initialization or updating timing of the predicted state memories 307-310. Therefore, an initializing time can be shortened by simultaneously clearing the predicted state memories 307-310 of four banks.</p>
申请公布号 JPH06152987(A) 申请公布日期 1994.05.31
申请号 JP19920303931 申请日期 1992.11.13
申请人 CANON INC 发明人 ANDO TSUTOMU;ISHIZUKA TAKAHARU
分类号 G06F15/18;G06N99/00;G06T9/00;H03M7/30;H03M7/40;H04N1/413;H04N1/417;H04N19/33;H04N19/42;H04N19/423;H04N19/426;H04N19/50;H04N19/85;H04N19/91;(IPC1-7):H04N1/417;G06F15/66;H04N7/137 主分类号 G06F15/18
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