| 摘要 |
A user-programmable FPGA architecture includes a plurality of logic function circuits including inputs and outputs disposed on an integrated circuit. A plurality of input/output (I/O) modules are also disposed on the integrated circuit and each include an input buffer having an input connected to I/O pad on the integrated circuit and an output connected to an output node, and an output buffer having an input connected to an input node, an output connected to the I/O pad, and a control input connected to a control node. A general interconnect structure disposed on the integrated circuit includes a plurality of interconnect conductors which may be connected to one another, to the inputs and outputs of the logic function circuits, and to the I/O modules by programming user-programmable interconnect elements. Direct interconnections are made between the inputs of selected ones of the logic function circuits and the output nodes of selected ones of the I/O modules. Direct interconnections are made between the outputs of selected ones of the logic function circuits and the input nodes of selected ones of the I/O modules. Direct interconnections are made between the outputs of selected ones of the logic function circuits and the control nodes of selected ones of the I/O modules.
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