发明名称 FRAME PROCESSING BUFFER DEVICE
摘要 <p>PURPOSE:To decrease a reception processing delay, to reduce the capacity of a buffer and to prevent the frame processing buffer device from being stopped due to the buffer fully occupied by allowing the frame processing buffer device to identify a cell and to transfer the identified result to its relevant area. CONSTITUTION:This device consists of an idle buffer section 20 storing information of an idle buffer, a cell reception section 21 receiving and processing the cell, a reception cell information section 22 storing link information, a reception cell buffer section 23 storing the cell and a transfer section 24 transferring the cell and informing the undesired buffer to the idle buffer information section 20. The reception processing delay is reduced by setting reception cell number information and a threshold level of transfer start to the reception cell information section 22 to reduce the capacity of the buffer. Thus, it is prevented that the frame processing buffer device is stopped due to the buffer fully occupied.</p>
申请公布号 JPH06152627(A) 申请公布日期 1994.05.31
申请号 JP19920300741 申请日期 1992.11.11
申请人 MATSUSHITA ELECTRIC IND CO LTD 发明人 TANAKA OSAMU;ASANO HIROAKI;TAKASHIMA ICHIRO;NISHIOKA SHINAKO
分类号 (IPC1-7):H04L12/48 主分类号 (IPC1-7):H04L12/48
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