发明名称 Ball grid array arrangement
摘要 A ball grid array arrangement comprises a dielectric multilayer substrate, in a lower metallisation layer of which is disposed an array of solder balls. A passive circuit element is integrated into at least one of the metallisation layers. The arrangement may be either a discrete component consisting of a triplate transmission-line resonator or interdigitated filter integrated into an inner metallisation layer and defined by that layer in conjunction with adjacent layers, or it may take the form of an IC carrier or multichip-module carrier having such transmission structures situated within a central die-attach area of the substrate and having also a peripheral area containing bonding structures for the mounting of at least one chip or chip module. There will normally be at least two groups of such bonding structures, and a passive circuit element in the form of an inductor may be formed in the upper metallisation layer between adjacent groups of bonding structures. <IMAGE>
申请公布号 GB9406377(D0) 申请公布日期 1994.05.25
申请号 GB19940006377 申请日期 1994.03.30
申请人 PLESSEY SEMICONDUCTORS LIMITED 发明人
分类号 H01L23/12;H01L21/822;H01L23/498;H01L23/538;H01L25/16;H01L27/04;H01P1/203;H01P7/08;H05K1/02;H05K3/34;H05K3/36 主分类号 H01L23/12
代理机构 代理人
主权项
地址