发明名称
摘要 A semiconductor memory device provided with an improved precharge scheme for bit lines is disclosed. A plurality of bit lines are divided into a plurality of bit line group and a precharge control signal is applied only to precharge transistors in a selected bit line group.
申请公布号 JPH0640439(B2) 申请公布日期 1994.05.25
申请号 JP19860033274 申请日期 1986.02.17
申请人 发明人
分类号 G11C11/409;G11C7/12;G11C8/12;G11C11/401;G11C11/41;G11C11/419 主分类号 G11C11/409
代理机构 代理人
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