Method and apparatus for rapidly processing data sequences

摘要

Improved method and apparatus are provided for performing parallel and pipeline processing of data sequences. The apparatus includes a plurality of memory circuits and a plurality of data processors wherein each data processor is constructed for parallel and pipeline processing of data sequences. Address controllers are provided for routing data between the memory circuits and the pixel processors. The address controllers are capable of directly coupling any memory circuit to any pixel processor so that data may be simultaneously transferred from a plurality of memory circuits to a plurality of pixel processors. Further, the pixel processors are provided with processing elements for performing data processing on neighboring data words of a data sequence. The address controller is constructed for providing data from the memory circuits in a plurality of sequences so that the data may be provided to the pixel processor first and second times in respective first and second sequences to enable two dimensional processing of the data sequence. A feature processor is provided for extracting specific information from the processed image data, relating to features of objects contained therein.