| 摘要 |
An improved frequency and phase lock detection circuit includes a first circuit for receiving a first signal and a second circuit for receiving a second signal. A detecting circuit detects that one of the first and second signals is being received by one of the first and second receiving circuits and produces a detect signal indicative thereof. A comparing circuit detects that the first and second signals have substantially the same frequency and phase and produces a compare signal indicative thereof. An output circuit receives the detect signal and the compare signal and produces a locked signal in response thereto which indicates that at least one of the first and second signals is being received and that the first and second signals are substantially identical in frequency and phase.
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