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发明名称
PHASE LOCKED LOOP FREQUENCY SYNTHESIZER
摘要
申请公布号
JPH06140930(A)
申请公布日期
1994.05.20
申请号
JP19920288830
申请日期
1992.10.27
申请人
FUJITSU LTD
发明人
WATANABE YASUNOBU
分类号
H03L7/10;H03L7/183;(IPC1-7):H03L7/183
主分类号
H03L7/10
代理机构
代理人
主权项
地址
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