MULTIPROCESSOR MEMORY SYSTEM

摘要

PURPOSE: To provide a new multiprocessor memory system. CONSTITUTION: A parallel array processor for expanded parallel application is formed by using a low-output CMOS provided with a DRAM for processing elements while integrating them onto a single chip. Eight processors on the single chip are mutually connected through a topology corrected based on a hypercube while having respective related processing elements, mass memory and input/output. Next, these nodes are mutually connected through the hypercube, corrected hypercube, ring or ring network topology inside the ring.