| 摘要 |
PURPOSE:To avoid excess of a prescribed mis-detection rate independently of the system by controlling the detection rate of a bit rate detection means so as to suppress an unsuccess rate of synchronization establishment to be a prescribed value or below. CONSTITUTION:An MPU receives an event where a synchronization state monitor signal (v) outputted from a synchronization control circuit changes from 0 to 1 and then increments a mis-detection counter by 1 when the synchronization monitor signal (v) changes from 1 to 0 with a synchronization monitor signal (r) set to 0 while no synchronizing signal is detected. The MPU revises an edge counter setting value of an edge count setting section of a bit rate detection circuit 306 into (N-1) decremented by 1 with an edge counter setting signal (u) provided via an MPU interface circuit 307 when a mis-detection rate (r) obtained by checking the count once for a prescribed time exceeds a preset mis-detection rate a to decrease the mis-detection rate of the bit rate detection circuit 306 and to reset the mis-detection counter. |
