| 摘要 |
PURPOSE:To improve an error detection rate for the omission or duplication of a bit generated at a part between a frame synchronous word and a frame number without attaching an error detection/correction code by comparing the frame number with a predictive frame number, and outputting a frame number coincidence signal when coincidence is obtained between them. CONSTITUTION:A PCM digital signal 41 is inputted to the shift register 11 of a frame number word holding circuit 1 via a shift register 42, and a delay circuit 5, and it is shifted by one bit per clock, and the bit of a frame number word is outputted to a latch 12 at every clock. The latch 12 latches the output data of the register 11 by a synchronizing signal from a frame synchronous circuit 4, and outputs the frame number word. The latch 21 of a frame number prediction circuit 2 latches the frame number word by a frame synchronizing signal, and an adder 22 adds a count-up value 23, and outputs by generating a predictive frame number word. A comparator 31 compares the frame number word with the predictive frame number word from the adder 22, and outputs a frame number word coincidence signal when the coincidence between them can be obtained. |
