| 摘要 |
A semiconductor memory device including a substrate on which a memory cell array portion and a peripheral circuit portion for the memory cell array portion are provided, the surface of the memory cell array portion being higher than the surface of the peripheral circuit portion. A glass layer is formed on the peripheral circuit portion with the glass layer having a predetermined thickness for offsetting the difference in height between the surface of the memory cell array portion and that of the peripheral circuit portion, so as to provide a substantially even surface over the memory cell array portion and the peripheral circuit portion. A metal wiring for the memory cell array portion and the peripheral circuit portion is formed in a predetermined pattern on the substantially even surface.
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