发明名称 Method and apparatus for simulating a microelectronic circuit
摘要 A method and apparatus for simulating a microelectronic circuit includes the steps of storing of a microelectronic circuit or system representation in a computer system and then dividing the circuit or system into portions containing nonlinear elements and linear partitions. The linear partitions are then independently solved for by modelling each linear partition using Asymptotic Waveform Evaluation (AWE) to form multiport admittance macromodels. These macromodels provide admittance and current stencils, which may be functions of time, to a global MNA matrix used by SPICE at each time point to simulate the operation of the entire microelectronic circuit. A linearized transient representation for the nonlinear elements is provided as SPICE admittance and current stencils using conventional techniques. By using AWE techniques to solve the linear partitions separately, significant savings in computation time and improved computational storage efficiency can be achieved.
申请公布号 US5313398(A) 申请公布日期 1994.05.17
申请号 US19920919160 申请日期 1992.07.23
申请人 CARNEGIE MELLON UNIVERSITY 发明人 ROHRER, RONALD A.;RAGHAVAN, VIVEK;BRACKEN, J. ERIC
分类号 G06F17/50;(IPC1-7):G06F15/20 主分类号 G06F17/50
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