| 摘要 |
An embodiment of the present invention is an improved insulated-gate, field-effect transistor and a three-sided, junction-gate field-effect transistor connected in series on the same chip to form a high-voltage MOS transistor. An extended drain region is formed on top of a substrate of opposite conductivity material. A layer of material with a conductivity opposite to that of the material of the extended drain region is buried within the extended drain region such that field-effect pinch-off depletion zones extend both above and below the buried layer. A top layer of material similar to the substrate is formed by ion implantation through the same mask window as the extended drain region. The top layer covers the buried layer and extended drain region and itself is covered by a silicon dioxide layer above. Current flow through the extended drain is controlled by the substrate and buried layer when a voltage is applied to pinch-off the extended drain between them in a familiar field-effect fashion.
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