TEST METHOD FOR SEMICONDUCTOR INTEGRATED CIRCUIT,申请号JP19920282104-传众专利搜索

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发明名称	TEST METHOD FOR SEMICONDUCTOR INTEGRATED CIRCUIT
摘要
申请公布号	JPH06130132(A)	申请公布日期	1994.05.13
申请号	JP19920282104	申请日期	1992.10.21
申请人	FUJITSU LTD	发明人	YAMAUCHI HITOSHI
分类号	G01R31/28;(IPC1-7):G01R31/28	主分类号	G01R31/28
代理机构		代理人
主权项
地址

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