发明名称 |
Logic circuit and semiconductor device |
摘要 |
In order to obtain a logic circuit capable of performing a high-speed operation, respective gates of a P-channel MOSFET (1) and an N-channel MOSFET (2) are connected to an input node (6) in common, and ends of resistors (12, 13) are connected to respective drains thereof. Respective emitters of an NPN transistor (3) and a PNP transistor (4) are connected to an output node (9) with an end of a resistor (5) in common, and ends of the resistors (12, 13) are connected to respective bases thereof. A source of the P-channel MOSFET (1) and a collector of the NPN transistor (3) are connected to a high potential point (8) in common while a source of the N-channel MOSFET (2) and a collector of the PNP transistor (4) are connected to a low potential point (40) in common respectively. Respective other ends of the resistors (5, 12, 13) are connected at a node (7) in common. Thus, the potential of an output terminal quickly fluctuates when a bipolar transistor is in an ON state.
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申请公布号 |
US5311078(A) |
申请公布日期 |
1994.05.10 |
申请号 |
US19920878615 |
申请日期 |
1992.05.05 |
申请人 |
MITSUBISHI DENKI KABUSHIKI KAISHA |
发明人 |
MAKINO, HIROSHI;NAKASE, YASUNOBU;UEDA, KIMIO |
分类号 |
H01L21/8249;H01L27/06;H03K19/013;H03K19/0944;(IPC1-7):H01L29/78;H01L29/02;H03K19/02;H03K19/08 |
主分类号 |
H01L21/8249 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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