LOCK TRANSFER SYSTEM FOR MULTIPLEXED BUS

摘要

PURPOSE:To realize a system in which a processing inconsistency which may occur at the time of a lock transfer execution can be erased by multiplexing the system bus of a sprit transfer system by the addition of two discharge end display signals, and a simple control circuit. CONSTITUTION:A discharge request communication signal 4a1 is communicated also to a BIc inside control circuit I2 of the other BIc(4-4), and a discharge request communication signal line 4a2 is asserted, and the discharge of a transmission and reception buffer is started. The both BIc inside control circuits assert discharge end communication signal lines 4bl and 4b2 of the transmission and reception buffers of its own BIc, and the discharge end communication signal lines 4b1 and 4b2 are inputted to the first AND gates 4c2 and 4c1 of the other BIc. A driver 4f01 asserts a signal for a discharge end display inclined in a system bus 6-1 by the assert of a signal 4f1. A driver 4f02 asserts a signal for a discharge end inclined in a system bus 6-2 by the assert of a signal 4f2.