发明名称 CLOCK ADJUSTMENT SYSTEM
摘要 <p>PURPOSE:To highly precisely adjust a clock in a few hardware. CONSTITUTION:One of reference clocks distributed from the output of a clock distributing LSI 1 by using a tree-shaped wiring 2 is received by one LSI terminal, and a difference between the output phase of the reference clock and the output phase of a clock generated from a clock source which is the same as the reference clock, and allowed to pass through a general distribution path is observed. Thus, the phase adjustment of the clock can be attained.</p>
申请公布号 JPH06124138(A) 申请公布日期 1994.05.06
申请号 JP19920273240 申请日期 1992.10.12
申请人 FUJITSU LTD 发明人 KUBOTA KATSUHISA
分类号 G06F1/10;G06F15/78;(IPC1-7):G06F1/10 主分类号 G06F1/10
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