Elektronischer Baustein mit einer taktgesteuerten Schieberegisterprüfarchitektur (Boundary-Scan)

摘要

A clock-controlled boundary-scan device integrated on an electronic chip exhibits a shift register of register elements. These register elements in each case form a signal path for connecting a digital circuit input/output of a chip-internal circuit arrangement to a chip terminal and in each case a shifting path for connection to adjacent register elements. In the scan device, an operating mode can be activated in which at least one sequence of n register elements (BSC) forms a shift register with feedback. This shift register with feedback is used for generating an n-bit-long bit pattern sequence, which can be output to chip terminals (BA) or for forming a signature from an n-bit-long bit pattern sequence supplied to the register elements at the chip-terminal end.