发明名称 Phase synchronization circuits.
摘要 <p>A phase synchronization circuit, for generating a clock signal from an input signal, has a VCO (11), a phase comparator (12) for comparing the phase of the input signal with that of an output signal of the VCO, and a loop filter (13) for receiving an output signal of the phase comparator and providing a control voltage for the VCO. The loop filter includes first and second voltage-current converters (14, 15) for receiving the output signal of the phase comparator; a capacitor (16) to be charged and discharged according to an output current of the first voltage-current converter; and a resistor (17) for converting the output signal of the second voltage-current converter into the control voltage for the VCO. The ratio between currents for the input and output stages of a current multiplier in each of the first and second voltage-current converters is changed according to a control current provided through a control terminal when the frequency of the input signal is changed, to thereby change a transconductance of the converters without changing a damping factor. In this way, the circuit speedily carries out phase synchronization without changing a damping factor even if the frequency of an input signal is changed. &lt;IMAGE&gt;</p>
申请公布号 EP0595632(A2) 申请公布日期 1994.05.04
申请号 EP19930308593 申请日期 1993.10.28
申请人 FUJITSU LIMITED 发明人 SHIMODA, KANEYASU
分类号 H03L7/093;H03L7/10;H03L7/107;(IPC1-7):H03L7/107 主分类号 H03L7/093
代理机构 代理人
主权项
地址