| 摘要 |
An image data processing apparatus selects and extracts the elements of a desired 8x8 matrix from four matrices in real space each having 8 rows and 8 columns and effects an inverse discrete cosine transform on the four matrices. The elements of the four matrices each of the 8 rows and 8 columns are arranged into four vectors each of 64 elements. The elements of the vectors are supplied serially to four 64-output serial-to-parallel converters, which output the elements in parallel. Data selectors then select the 64 elements of one of the vectors. Half of the selected elements are processed by a 32-element inner product processing circuit, which produces a first inner product output signal. The remaining selected elements are processed by another 32-element inner product processing circuit, which produces a second inner product output signal. The first and second inner product output signals are added into a final output signal by an adder.
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