Read only memory device equipped with output data buffer circuits less affectable by noises on power voltage line

摘要

A read only memory device firstly charges a digit line and, thereafter, couples the digit line with a discharging line so as to see whether or not a selected memory cell location provides a current path to the discharging line, wherein an n-channel enhancement type transfer transistor is coupled between a column selector and an output driver circuit for introducing time delay into undesirable voltage fluctuation due to noises on the discharging line, thereby preventing an output data signal from undesirable inversion.