| 摘要 |
PURPOSE:To provide a method capable of manufacturing a semiconductor device including the capacitor having a large capacity with a small number of easy processes. CONSTITUTION:On the surface of a silicon substrate 1, a diffusion region 6 and gate electrodes 4, 5 are formed, and using a reduced-pressure CVD method, a non-doped polysilicon layer 8 is so deposited that the lower part thereof is connected with the diffusion region 6. Then, in the same reduced-pressure CVD method, a polysilicon layer 9 doped with phosphorus by about 5X10<20>atm/ cm<3> is deposited thereon. These depositions are repeated, and a multilayer film comprising five layers is formed. The multilayer film is etched using an RIE method, and a sidewall surface is formed on the multilayer film, and thereby, an underside electrode 11 is formed. Further, using the solution of HF:HNO3: CH3COOH=1:3:8, a wet etching is applied to the underside electrode 11. Thereby, since the etching rates of the polysilicon layers 8, 9 are different from each other, recessed parts are formed on the sidewall surface of the underside electrode 11. |
