| 摘要 |
A frequency stabilizer for use in a time-division multiplexed digital cellular system is designed to reduce the consumption of electric power by means of a receiving circuit in continuous frequency control. The frequency stabilizer includes a pair of latches 4 and 5 for latching a phase error of an output signal from a phase error integrating circuit 2, a subtractor 6 for outputting the difference between respective output signals from the latches 4, 5, and a selector switch 8 for selecting and outputting an output signal from a phase-to-frequency converter 3 in the period of a reception slot and an output signal from a frequency correcting circuit 7 between reception slots. When the selector switch 8 is selecting the output signal from the frequency correcting circuit 7, no electrical energy is supplied to the receiving circuit. Even when the frequency stabilizer is in continuous operation, the receiving circuit operates only during the reception slot, resulting in reduced consumption of electrical energy. <IMAGE> |
