发明名称 |
SIGNAL HANDLING SYSTEM WITH A SHARED DATA MEMORY |
摘要 |
A signal processing system includes a superior control processor (2) and a number of digital signal processors (4-10), which are controlled by the control processor and normally operate internally with real time applications. A shared data memory (18) is included with a bus (20), on which the control processor normally is bus master, and to which the signal processors have access. An arbitration logic (28) controls the access of the processors (4-10) to the shared data memory. The signal processors (4-10) are directly connected to the bus (20) and normally keep their data and address buses (22) on a high impedance level with respect thereto. |
申请公布号 |
WO9409437(A1) |
申请公布日期 |
1994.04.28 |
申请号 |
WO1993SE00840 |
申请日期 |
1993.10.14 |
申请人 |
TELEFONAKTIEBOLAGET L M ERICSSON |
发明人 |
SVENSSON, LARS;ZEBERG, JOHAN |
分类号 |
G06F13/16;G06F13/364;G06F15/167;(IPC1-7):G06F13/366 |
主分类号 |
G06F13/16 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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