| 摘要 |
<p>A piezoelectric transducer chip (10) comprising a plurality of transducer elements (11, 12, 14) arranged in a two-dimensional array is disclosed. At leat one of the transducer elements is a multi-layer element which comprises a plurality of piezoelectric layers (24, 26, 28, 30, 32), each of which is separated from the adjacent piezoelectric layers by an electrode layer (34, 36, 38, 40) so that a plurality of capacitive elements is electrically connected in parallel. A first via (46) connects a first set of alternating electrode layers, and a second via (54) connects a second set of alternating electrode layers. The first via is insulated from the second set of alternating electrode layers, and the second via is insulated from the first set of alternating electrode layers. At least one of the plurality of multi-layer elements has an internal edge. At least one of the vias of a multi-layer element is an internal via. Also disclosed are an ultrasonic transducer (11) which includes such a piezoelectric chip, and an ultrasonic scanner (140) which includes such a transducer.</p> |
