发明名称 DISPLAY DEVICE
摘要 PURPOSE:To delete the address generating circuit for a buffer memory by writing one data signal in a display memory as it is and the other in a first-in first-out memory which requires no address. CONSTITUTION:The display data signal 101B is written in the display memory 105 while a display data output circuit 106 does not access the display memory 105. Namely, the signal is written in the display memory 105 when a memory non-access signal 109 outputted from the display data output circuit 106 is inputted to a display memory access control circuit 104. The display data signal 101A, on the other hand, is temporarily inputted to the first-in first-out memory (FIFO) 103. The data is written in the display memory 105 when the display data output circuit 105 does not access the display memory control circuit 104 and the display data signal 101B is not inputted.
申请公布号 JPH06118941(A) 申请公布日期 1994.04.28
申请号 JP19920268311 申请日期 1992.10.07
申请人 NEC CORP;NEC ENG LTD 发明人 NAGATSUKA NORIYUKI;SATO YUKIE
分类号 G09G5/00;G06T1/60;G06T3/00;G09G5/36;(IPC1-7):G09G5/36;G06F15/66;G06F15/64 主分类号 G09G5/00
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