发明名称 CLOCK SIGNAL REPRODUCTION SYSTEM
摘要 PURPOSE:To improve the accuracy comparing with a conventional method with a simplified processor which requires low-power consumption by outputting data values by interpolation and reducing the sampling frequency to the limit. CONSTITUTION:The data at the point of identification are interpolated and outputted by applying digital interpolation circuits 510 and 511 by a time change coefficient FIR filter to a clock reproduction circuit 512. At the same time, the delay time difference between an identification point and a sampling point is removed by interpolation.
申请公布号 JPH06120991(A) 申请公布日期 1994.04.28
申请号 JP19920264585 申请日期 1992.10.02
申请人 HITACHI LTD 发明人 ONISHI MAKOTO
分类号 H04L7/00;H04L7/027;H04L27/22 主分类号 H04L7/00
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