发明名称 DECODER
摘要 <p>PURPOSE:To realize almost the same operating speed as that in the case of configuration decoding only a variable length code in one cycle while decoding sets of the variable length coding and a quasi-fixed length code succeeding thereto in one cycle. CONSTITUTION:A decoder is provided with a tentative storage section 150 storing tentatively sets of a variable length coding and a quasifixed length code succeeding thereto and outputting an M-bit string and with a variable length coder encoder 105 decoding the variable length code from the bit string and detecting the code length, and also with a bit string selector 111 outputting a bit string excepting the variable length code bit string from the M-bit string, a quasi-fixed length coder encoder 112 decoding the quasi-fixed length code from the bit string outputted from the bit string selection section 111 and detecting its code length. The tentative storage section 150 is provided with an adder 108 adding a head position selection signal of the bit string and the code length of the variable length code and an adder 115 adding the result of the adder 108 and the code length of the quasi-fixed length code.</p>
申请公布号 JPH06112841(A) 申请公布日期 1994.04.22
申请号 JP19920286739 申请日期 1992.09.30
申请人 TOSHIBA CORP 发明人 YAMAKAGE TOMOO;KAMIYA YOSHIHARU
分类号 H03M7/40;G06T9/00;H04N1/41;H04N19/00;H04N19/423;H04N19/44;H04N19/503;H04N19/61;H04N19/625;H04N19/85;H04N19/91;(IPC1-7):H03M7/40;G06F15/66;H04N7/13 主分类号 H03M7/40
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