| 摘要 |
<p>PURPOSE:To provide an erroneous latch of a latch circuit at the time of verifying writing in a memory. CONSTITUTION:A sense amplifier 6 which detects data written in a non-volatile memory cell and a latch circuit which latches an output of this sense amplifier in accordance with a latch signal are provided. Also, a latch releasing circuit 10 which obstructs a latch signal A1 inputted to the latch circuit in accordance with a latch releasing signal C1 is provided. The latch releasing signal C1 is a signal, for example, generated by a voltage detecting circuit for writing, it is made 'HIGH' at the time of normal reading, and made 'LOW' at the time of verifying writing.</p> |
