发明名称 ERROR CORRECTION DEVICE IN MASK PATTERN DESIGN FOR INTEGRATED CIRCUIT
摘要 PURPOSE:To eliminate correction omission and to reduce the number of times of geometric rule checking in the case of correcting the errors of mask pattern data at the time of designing mask pattern of an integrated circuit. CONSTITUTION:By extracting error graphic coordinates from a checked result file at the time of correcting the errors for the mask pattern data (step A,) displaying the coordinates and the presence of correction on the screen of a computer (step B,) generating the command procedure of a mask pattern editor capable of easily performing the correction by the mask pattern editor by selecting the coordinates (step C) and performing the correction, the sure correction corresponding to the error coordinates can be performed.
申请公布号 JPH06110969(A) 申请公布日期 1994.04.22
申请号 JP19920259193 申请日期 1992.09.29
申请人 NEC IC MICROCOMPUT SYST LTD 发明人 ASO MASAO
分类号 G03F1/84;G06F17/50 主分类号 G03F1/84
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