| 摘要 |
<p>PURPOSE: To minimized necessary space by mapping a redundant column to any input and output buffer in stead of a defective column at any bit position. CONSTITUTION: Each of plural redundant columns 20RED can be mapped any one of input buffers 46 and output buffers 58 instead of one defective column. A fuse coincidence logic circuit 60 stores the address of a defective column, and an input/output fuse decoder circuit 62 is connected to the logic circuit 60 and stores information for identifying the input buffer 46 and output buffers 58 related with each defective column. When a redundant column 20RED is selected in response to a column address signal part selecting a non-defective column and a reception column address is coincident with a stored column address, the redundant column selected by the column address signal part is mapped to the input buffer 46 and the output buffer 58 related with the defective column in stead of the defective column.</p> |
