发明名称 THIN FILM TRANSISTOR ARRAY
摘要 <p>PURPOSE:To lessen a gate insulating film in thickness so as to eliminate a complicated interface simple by a method wherein the gate insulating film formed on a gate electrode is of single-layered structure under an amorphous semiconductor layer and of multilayered structure under the other part. CONSTITUTION:A gate electrode 102 is formed on a substrate 101, a silicon oxide film is formed on all the surface of the substrate 101, a part of the silicon oxide film predermined to intersect an amorphous silicon semiconductor layer 103 is removed, and a gate insulating layer 109 is formed. Furthermore, a silicon nitride film, an amorphous silicon film, and an N-amorphous silicon film are successively formed in a vacuum. The silicon nitride film is made to serve as a gate insulating film 110. Then, the amorphous silicon film and the N- amorphous silicon film are processed into the prescribed patterns on the gate electrode 102 and a necessary part for the formation of an amorphous silicon semiconductor layer 103. By this setup, a part of a gate insulating layer, which intersects an amorphous silicon semiconductor layer that serves as the operating part of a transistor, is formed in single layer.</p>
申请公布号 JPH06112485(A) 申请公布日期 1994.04.22
申请号 JP19920258484 申请日期 1992.09.28
申请人 NEC CORP 发明人 KANEKO WAKAHIKO
分类号 G02F1/136;G02F1/1368;H01L21/336;H01L29/78;H01L29/786;(IPC1-7):H01L29/784 主分类号 G02F1/136
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