发明名称 FRAME SYNCHRONIZATION CIRCUIT
摘要 PURPOSE:To reduce the circuit scale of the frame synchronization circuit used for a receiver of QAM or QPSK orthogonal modulation system or the like. CONSTITUTION:An in-phase component I and an orthogonal component Q in an output of a carrier period detection are outputted switchingly from registers 1, 2 to a correlation device 3, in which the correlation is obtained and comparators 4, 5 output a significant level when an in-phase threshold level C0 (C0>0) and an opposite phase discrimination threshold level C1 (C1<0) are exceeded respectively and the result is given to a frame synchronization control circuit 6, from which synchronization phase information decided by the combination of the frame synchronization pulse and the significant level of I, Q is outputted.
申请公布号 JPH06112983(A) 申请公布日期 1994.04.22
申请号 JP19920279160 申请日期 1992.09.25
申请人 KOKUSAI ELECTRIC CO LTD 发明人 SASA JUICHI;URABE KENZO
分类号 H04L7/00;H04L27/22;H04L27/38 主分类号 H04L7/00
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