发明名称 CELL PRIORITY CONTROL OUTPUT BUFFER DEVICE
摘要 <p>PURPOSE:To implement cell priority control without different cell input sequence and output sequence in an output buffer type ATM exchange. CONSTITUTION:In the cell priority control output buffer device in the output buffer type ATM exchange, a post-stage output buffer circuit 3 outputs a buffer overflow signal 4 when a cell input exceeds a buffer allowable value. A low priority cell abort circuit 1 placed at a pre-stage of a pre-stage output buffer circuit 2 located at a pre-stage of the post-stage output buffer circuit 3 aborts a low priority cell when the post-stage output buffer circuit 3 outputs the buffer overflow signal 4 to apply cell priority control without difference of cell input sequence and output sequence.</p>
申请公布号 JPH06112968(A) 申请公布日期 1994.04.22
申请号 JP19920257869 申请日期 1992.09.28
申请人 NEC CORP 发明人 ISHIDA KEISHIRO
分类号 (IPC1-7):H04L12/48 主分类号 (IPC1-7):H04L12/48
代理机构 代理人
主权项
地址