发明名称 ANALOG MULTIPLIER CIRCUIT
摘要 PURPOSE:To reduce a carrier leak by enlarging the capacity between a base and a collector of a bidifferential transistor. CONSTITUTION:Bidifferential transistors 9-12 constitute an operational amplifier for suppressing the same phase input signal component to the utmost by an output, and obtaining an output to a differential input signal component. In this regard, capacities 13-16 are added between each collector-base of the differential transistors 9-12. In such a state, input signals from carrier input terminals 1, 2 are impressed to each base of the bidifferential transistors 9-12 through emitter follower circuits 3, 4, respectively, analog multiplication is executed by these bidifferential transistors 9-12 and a base band input 19, and a multiplication output is obtained in output terminals 17, 18. In such a way, a carrier leak caused by asymmetry of an element for constituting an analog multiplier of a gilbert cell type can be reduced.
申请公布号 JPH06111037(A) 申请公布日期 1994.04.22
申请号 JP19920279226 申请日期 1992.09.25
申请人 NEC CORP 发明人 MINEO MASAO
分类号 G06G7/163;H03F3/45;(IPC1-7):G06G7/163 主分类号 G06G7/163
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