SEMICNDUCTOR INTEGRATED CIRCUIT

摘要

PURPOSE:To improve the minimum operation voltage characteristic and the maximum operation frequency characteristic by providing selecting circuits for word lines connected to control gates of non-volatile memory cells and circuits which convert output of the selecting circuits in a level by a booster circuit and output them to word lines. CONSTITUTION:One of word lines RA0-1 connected respectively to control gates of non-volatile memory cells E11-E14, E21-E24, E31-E34 and E41-E44 is selected by a row decoder 18. Drains of each cell are connected to one of bit lines B0-B3 connected to a node N1 via transistors CO-C3 of which gates are connected to column selecting lines CA0-CA3 and sources are connected to GND. Further, a booster circuit 23 boosts Vcc and supplies it to a level shift circuit, a circuit 19 converts an output of a decoder 18 in a level and outputs it to word lines. Also, a transistor 11 between the node N1 and power supply voltage Vpp is conducted at the time of writing data. Thereby, the minimum operation voltage characteristic and the maximum operation frequency characteristic are improved.