发明名称 PLL PRESET METHOD AND PRESET TYPE PLL CIRCUIT
摘要 PURPOSE:To improve the C/N, simplify the circuit and to make preset data accurate. CONSTITUTION:The preset type PLL circuit comprising a phase comparator 1, a variable frequency divider 8, a VCO 2, a loop filter 4, a ROM 6, a RAM 7 and a CPU 5 is provided with a D/A converter 3 and an unlock detection means 9. Simultaneously at application of power, data corresponding to a preset frequency are read out and fed to a variable frequency divider 8, a VCO 2 is oscillated at a minimum frequency, then control data are changed by a specified value each and fed to the VCO 2 via D/A converter 3 and an unlock state is monitored by an unlock detection means. Then the data in unlock state are extracted and corrected by a data correction means and written in the RAM 7. The stored preset data are read out of the RAM 7 and inputted to the D/A converter 3 to control the VCO 2.
申请公布号 JPH06112818(A) 申请公布日期 1994.04.22
申请号 JP19920261706 申请日期 1992.09.30
申请人 ICOM INC 发明人 ASADA KAZUHIDE
分类号 H03L7/10;H03L7/187 主分类号 H03L7/10
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