| 摘要 |
<p>PURPOSE:To provide a CMOS delay circuit which obtains a desired delay time with a small number of elements. CONSTITUTION:A P-channel MOS transistor TR 1 in the last stage, an N- channel MOS TR 2, a P-channel MOS TR gate charging circuit 4 which takes an input signal as the input to control the gate of the P-channel MOS TR 1, and an N-channel MOS TR gate discharging circuit 5 which takes the input signal as the input to control the gate of the N-channel MOS TR 2 are provided. A P-channel MOS TR gate discharging circuit 6 which takes the input signal as the input through an inverting logic element 3 to control the gate of the P-channel MOS TR 1 and an N-channel MOS TR gate charging circuit 7 which takes the input signal as the input through the inverting logic element 3 to control the gate of the N-channel MOS TR 2 constitute the CMOS delay circuit.</p> |
