发明名称 Method of forming a gate overlap LDD structure
摘要 A method is provided for forming a gate overlap LDD structure of an integrated circuit, and an integrated circuit formed according to the same. An oxide layer is formed over a substrate. A four layered gate electrode is formed in an inverse T shape. A first polysilicon layer is formed over the underlying oxide layer. A first conductive layer is formed over the first polysilicon layer. A second polysilicon layer is formed over the first conductive layer. A second conductive layer is then formed over the second polysilicon layer. The second conductive and polysilicon layers are etched to expose a portion of the underlying first conductive layer. Lightly doped drain regions are formed in the substrate adjacent to the second conductive and polysilicon layers. Sidewall oxide spacers are formed on the sides of the second conductive and polysilicon layers and on top of the first conductive layer. The first conductive and polysilicon layers are etched exposing a portion of the underlying oxide layer. Source/drain regions are formed in the substrate adjacent to the first conductive and polysilicon layers.
申请公布号 US5304504(A) 申请公布日期 1994.04.19
申请号 US19930071563 申请日期 1993.06.02
申请人 SGS-THOMSON MICROELECTRONICS, INC. 发明人 WEI, CHE-CHIA;SUNDARESAN, RAVISHANKAR
分类号 B01D61/02;B01D61/08;B01D61/12;(IPC1-7):H01L21/265 主分类号 B01D61/02
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