| 摘要 |
A semiconductor memory device having a cell structure capable of maintaining a capacitance of a stacked capacitor at a satisfactory level, which is characterized in that in the first aspect, an insulation layer of an oxide film is formed on an upper surface of a polysilicon gate electrode and a side-wall of an oxide film is formed on the side surface thereof, and in the second aspect, after opening a storage electrode contact, another side-wall of an oxide film Is formed thereon. Accordingly, the space between the storage electrode contact and the polysilicon gate electrode can be made zero (0), that is, in a self-alignment form, resulting in a reduction in the necessary planar surface area of a memory cell to about 5 (my)m2 or less.
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