发明名称 Data processor
摘要 In a microcomputer having two program execution states including a supervisor state and a user state, there is disposed a flag or a register having such a flag indicating whether or not a RAM area used in the supervisor state can be used in the user state by the CPU. A judge circuit determines whether or not the CPU has made an attempt to invalidly access the RAM in the user state based on the content of the flag or the register and that of the supervisor/user state specify bit in the status register. In a case of an occurrence of an access violation, a violation signal is sent to the CPU and the selection signal of the RAM is disabled (to be set to an ineffective state), thereby increasing the reliability of the system.
申请公布号 US5305460(A) 申请公布日期 1994.04.19
申请号 US19880254267 申请日期 1988.10.05
申请人 HITACHI, LTD. 发明人 KANEKO, SUSUMU;KURAKAZU, KEIICHI
分类号 G06F9/455;G06F12/14;G06F21/00;G06F21/02;(IPC1-7):G06F9/00 主分类号 G06F9/455
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