发明名称 DIGITAL LIMITER
摘要 PURPOSE:To realize the prescribed digital limiter with a smaller circuit scale than that of a conventional limiter with respect to the digital limiter most suitable for a digital noise generating circuit used for a test equipment for modulation and demodulation characteristic or the like for a digital mobile communication equipment or the like in which an output level is limited respectively to a positive/negative maximum value when an input level exceeds a positive/negative maximum value. CONSTITUTION:The limiter is provided with a digital comparator (IC1) detecting both overflows that an n-bit input level exceeds a positive maximum value (2<n-m>-1) decided by a value (m) smaller than the value (n) and exceeds a negative maximum value (-2<n-m>), an inverter (IC2) to obtain low-order (n-m) bits of output n-bits by inverting a sign bit (Dn being the MSB) of input data, and a selector (IC3) whose output is controlled by an overflow detection output of the digital comparator (IC1), and the selector (IC3) uses the output of the inverter (IC2) as the input when the digital comparator (IC1) detects an overflow.
申请公布号 JPH06104673(A) 申请公布日期 1994.04.15
申请号 JP19920250260 申请日期 1992.09.18
申请人 FUJITSU LTD 发明人 INOUE TAKESHI;MIYAMOTO BUNICHI
分类号 H03B29/00;H03G11/00;H03K3/84;H04B7/26 主分类号 H03B29/00
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