| 摘要 |
The invention relates to counting circuits used to perform frequency divisions. In the conventional counting circuits, the minimum period of the pulses to be counted (I) has to be greater than the sum of the processing times of all the adders (A1-A5) in series in the circuit. The introduction of buffer registers (R1-R5) between the adders makes it possible, by memory-storage of the carry signals, greatly to increase the counting frequency, since the minimum period is then reduced to the sum of the working times of an adder and of a register. Application, in particular, to counting circuits used in frequency synthesisers. <IMAGE> |
