发明名称 Method for compiling computer instructions for increasing instruction cache efficiency
摘要 Method for compiling program instructions to reduce instruction cache misses and instruction cache pollution. The program is analyzed for instructions which result in a non-sequential transfer of control in the program. The presence of branch instructions and program loops are identified and analyzed. The instructions are placed in lines, and the lines are placed in a sequence to minimize potential misses.
申请公布号 US5303377(A) 申请公布日期 1994.04.12
申请号 US19900500627 申请日期 1990.03.27
申请人 NORTH AMERICAN PHILIPS CORPORATION 发明人 GUPTA, RAJIV;CHI, CHI-HUNG
分类号 G06F12/08;G06F9/45;G06F12/12;(IPC1-7):G06F9/44 主分类号 G06F12/08
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